ESMT
M12L128168A
Mode Register Set Cycle
Auto Refresh Cycle
0
1
2
3
4
5
6
0
1
2
3
4
5
6
7
8
9
10
C L O C K
C K E
H I G H
H I G H
C S
* N o t e 2
tR F C
R A S
* N o t e 1
* N o t e 3
C A S
A D D R
R a
Key
H I - Z
H I - Z
D Q
W E
D Q M
New
Co m m an d
M R S
New C om m a n d
:D o n' t C ar e
Au to Ref r es h
All banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
MODE REGISTER SET CYCLE
*Note : 1. CS , RAS , CAS , & WE activation at the same clock cycle with address key will set internal mode register.
2. Minimum 2 clock cycles should be met before new RAS activation.
3. Please refer to Mode Register Set table.
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2009
Revision: 2.3 41/45
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
