M11B1644A / M11B1644SA
M11L1644A / M11L1644SA
CBR REFRESH CYCLE
(A0~A10 ; OE = DON’T CARE)
tR P
tR A S
t R P
tR A S
V I H
V I L
R A S
tR P C
t C P
tC S R
tC S R
tCH R
tR P C
tC H R
V I H
V I L
C A S
I/O
OPE N
tR H R
tR S R
tR S R
tR H R
tR C H
V I H
V I L
W E
HIDDEN REFRESH CYCLE
( WE = HIGH ; OE = LOW)
( R E A D )
( R E F R ES H )
tR A S
tR A S
tR P
V I H
V I L
R AS
C AS
tC R P
tR C D
t C H R
tR S H
VI H
VI L
tA R
tR A D
t R A H
tR A L
tC A H
t AS R
tA S C
V I H
V I L
R O W
C O L U M N
A D D R
t A A
N O TE 1
tO F F 1
tR AC
tC A C
tC L Z
VO H
VO L
VA LI D D AT A
OP EN
O PE N
I/O
OE
tO F F 2
tO A C
tO R D
V I H
V I L
D O N ' T C A R E
U N D E F I N E D
OFF1
Note : 1. t
is reference from the rising edge of RAS or CAS , whichever occurs last.
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2001
Revision : 1.1
12/16