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S1D13506 参数 Datasheet PDF下载

S1D13506图片预览
型号: S1D13506
PDF下载: 下载PDF文件 查看货源
内容描述: S1D13506彩色LCD / CRT / TV控制器 [S1D13506 Color LCD/CRT/TV Controller]
分类和应用: 电视控制器
文件页数/大小: 696 页 / 5934 K
品牌: EPSON [ EPSON COMPANY ]
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Page 18  
Epson Research and Development  
Vancouver Design Center  
eight pixels. If a manually entered panel width is not a  
multiple of eight pixels a notification box appears and  
13506CFG rounds up the value to the next allowable  
width.  
Non-display period  
It is recommended that these automatically generated  
non-display values be used without adjustment.  
However, manual adjustment may be useful in fine  
tuning the non-display width and the non-display  
height.  
As a general rule passive LCD panels and some CRTs  
are tolerant of a wide range of non-display times. Active  
panels, TVs and some CRTs are far less tolerant of  
changes to the non-display period.  
Frame Rate  
Select the desired frame rate (in Hz) from the drop-  
down list. The values in the list are the range of possible  
frame rates using the currently selected pixel clock. To  
change the range of frame rates, select a different Pixel  
Clock rate (in MHz).  
Panel dimensions are fixed therefore frame rate can  
only be adjusted by changing either PCLK or non-  
display period values. Higher frame rates correspond to  
smaller horizontal and vertical non-display values, or  
higher frequencies.  
Pixel Clock  
Select the desired Pixel Clock (in MHz) from the drop-  
down list. The range of frequencies displayed is  
dependent on settings selected on the Clocks tab.  
For example:  
If CLKI is chosen to be Auto and LCD PCLK is sourced  
from CLKI on the Clocks tab, then the range for Pixel  
Clock will range from 1.5 MHz to 80 MHz.  
Selecting a fixed LCD PCLK on the Clocks tab, say  
25.175 MHz, will result in only four selections: 6.293,  
8.392, 12.587, and 25.175 MHz. (these frequencies  
represent the four possible frequencies from a fixed  
25.175 MHz input clock divided by the PCLK divider).  
TFT/FPLINE (pixels)  
These settings allow fine tuning of the TFT/D-TFT line  
pulse parameters and are only available when the  
selected panel type is TFT. Refer to S1D13506  
Hardware Functional Specification, document number  
X25B-A-001-xx for a complete description of the  
FPLINE pulse settings.  
S1D13506  
X25B-B-001-02  
13506CFG Configuration Program  
Issue Date: 01/03/14  
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