Epson Research and Development
Page 225
Vancouver Design Center
20.2 Clock Descriptions
20.2.1 MCLK
MCLK should be configured as close to its maximum (40MHz) as possible. The S1D13506
contains sophisticated clock management, therefore, very little power is saved by reducing
the MCLK frequency.
The frequency of MCLK is directly proportional to the bandwidth of the video memory.
The bandwidth available to the CPU (for screen updates) is that left over after screen refresh
takes its share. CPU bandwidth can be seriously reduced when the MCLK frequency is
reduced, especially for high-resolution, high-color modes where screen refresh has high
bandwidth requirements.
20.2.2 LCD PCLK
LCD PCLK should be chosen to match the optimum frame rate of the panel. See Section
18, “Clocking” on page 213 for details on the relationship between PCLK and frame rate,
and for the maximum supportable PCLK frequencies for any given video mode.
Some flexibility is possible in the selection of PCLK. Panels typically have a range of
permissible frame rates making it possible to choose a higher PCLK frequency and adjust
the horizontal non-display period (see REG[052h]) to bring the frame-rate down to its
optimal value.
20.2.3 CRT/TV PCLK
TVs and older CRTs usually have very precise frequency requirements, so it may be
necessary to dedicate one of the clock inputs to this function. More recent CRTs work
within a range of frequencies, so it may be possible to support them with BUSCLK or
MCLK.
TV mode with flicker filter requires PCLK to be twice (2x) the standard NTSC
(14.xxxMHz) and PAL (17.xxxMHz) clocks. A clock multiplier is used to create this clock,
REG[018h] bit 7 is used to enable it. Note that the clock 2x clock could also be used for
CRT support.
20.2.4 MediaPlug Clock
The MediaPlug Clock must be twice (2x) the frequency of VMPCLK. For timing see
Section 7.7, “MediaPlug Interface Timing” on page 123. VMPCLK is typically in the range
6-8MHz so MediaPlug Clock must be in the range of 12-16MHz.
Hardware Functional Specification
Issue Date: 01/02/06
S1D13506
X25B-A-001-10
EPSON [ EPSON COMPANY ]
