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S1D13506 参数 Datasheet PDF下载

S1D13506图片预览
型号: S1D13506
PDF下载: 下载PDF文件 查看货源
内容描述: S1D13506彩色LCD / CRT / TV控制器 [S1D13506 Color LCD/CRT/TV Controller]
分类和应用: 电视控制器
文件页数/大小: 696 页 / 5934 K
品牌: EPSON [ EPSON COMPANY ]
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Page 178  
Epson Research and Development  
Vancouver Design Center  
9 2D BitBlt Engine  
The S1D13506 has a built-in 2D BitBlt engine which increases the performance of Bit  
Block Transfers (BitBlt). This section will discuss the BitBlt engine design and function-  
ality.  
9.1 Functional Description  
The 2D BitBlt engine is designed using a 16-bit architecture. It implements a 16-bit data  
bus and supports both 8 and 16 bit-per-pixel color depths. The design does not support  
VGA planar mode.  
The BitBlt engine supports rectangular and linear addressing modes for source and desti-  
nation in a positive direction for all BitBlt operations except the move blit which also  
supports in negative direction.  
The BitBlt operations support byte alignment of all types. The BitBlt engine has a dedicated  
BitBlt IO access space allowing it to support multi-tasking applications. This allows the  
BitBlt engine to support simultaneous BitBlt and CPU read/write operations.  
9.2 BitBlt Operations  
Note  
For details on the operation of the BitBlt registers, see Section 8.3.12, “BitBlt Configu-  
ration Registers” on page 161.  
Write Blit  
Move Blit  
The Write Blit provides 16, two operand, ROP functions.  
The Move Blit provides 16, two operand, ROP functions and is supported in both a positive  
and negative direction.  
Read Blit  
The Read Blit supports bit block transfers from the display buffer to the host. No ROP  
function is applied.  
S1D13506  
X25B-A-001-10  
Hardware Functional Specification  
Issue Date: 01/02/06  
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