epc110
High speed detection rate design (refer also to datasheet epc112)
Figure 20 shows the epc 110 as an example in a high speed detection rate light barrier application with minimal part count. This design is
optimized for a fast reading of light beam interruptions. Where as the working principle is similar to the above example. This driver circuit
operates with a VDDLED in a range of 6 to 20 VDC.
VDD = +12V
+3.3V
LED
C2 1μF
C3 100nF
R1
47R
R3
R7
10k
10k
R5
12k
VDD
C4 100nF
C5 4.7nF
IR LED
TSML1000
epc110
R4
3k6
T2
BC846B
VDD33
VDD18
PD
T1
BC846B
LED
OUTN
OUTH
C1
10μF
Low ESR
GND
PD
epc300
R6
4k7
R2
13R
GND
OUTN
OUTH
Marked conductors must be short and low ohmic
C2
The epc112 device with its very sensitive input PD needs a well decoupled power supply
Figure 20: High speed detection rate light barrier application with minimal part count
Notice:
The schematic is for illustrating the basic circuit idea only. For the real built up the designer has to take all other additional influence factors in
consideration too e.g. design rules, power rating, heat dissipation, ...
The following table shows the parameter allocation in the memory:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ROM RAM
1
0
0
1
0
0
0
1
0
1
1
0
1
1
1
0
1
0
0
0
1
0
0
0
0
0
1
0
1
1
0
1
1
0
1
1
0
0
1
0
0
1
1
0
1
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
FUSEBIT
0
1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Application
parameters
2
don't use
don't use
don't use
don't use
don't use
Lot no. LSB
Lot no. MSB
Chip ID
Factory use only
Revision no.
no function
no function
no function
3
4
5
Trimming
6
7
Device Address
8
9
10
11
12
13
14
15
Chip ID
Figure 21: Detailed memory map epc110 “High speed”
Parameter settings can be done by writing complete 16 bit registers only.
© 2011 ESPROS Photonics Corporation
Characteristics subject to change without notice
22
Datasheet epc110 - V2.1
www.espros.ch
EPC [ ESPROS PHOTONICS CORP ]
