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EM482M3244VBC-8FE 参数 Datasheet PDF下载

EM482M3244VBC-8FE图片预览
型号: EM482M3244VBC-8FE
PDF下载: 下载PDF文件 查看货源
内容描述: 256MB ( 2M × 4Bank × 32 )同步DRAM [256Mb (2M】4Bank】32) Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 19 页 / 1127 K
品牌: EOREX [ EOREX CORPORATION ]
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eorex  
Preliminary  
EM488M3244VBC  
4. Operative Command Table (Continued) (Note 7)  
Current  
State  
/CS /R /C /W  
Addr.  
Command  
Action  
H
L
L
L
L
X
H
H
H
H
X
H
H
L
X
H
L
H
L
X
X
X
DESL  
NOP  
BST  
Nop Enter row active after tDPL  
Nop Enter row active after tDPL  
Nop Enter row active after tDPL  
BA/CA/A10 READ/READA Start read, Determine AP  
New write, Determine AP (Note 14)  
ILLEGAL (Note 9)  
ILLEGAL (Note 9)  
Write  
Recovering  
L
BA/CA/A10  
BA/RA  
WRIT/WRITA  
ACT  
L
L
L
L
H
H
H
L
BA, A10  
PRE/PALL  
L
L
H
L
L
L
L
X
H
H
L
L
X
H
H
H
L
X
H
L
X
REF/SELF  
MRS  
ILLEGAL  
ILLEGAL  
Op-Code  
X
X
X
DESL  
NOP  
BST  
Nop Enter pre-charge after tDPL  
Nop Enter pre-charge after tDPL  
Nop Enter pre-charge after tDPL  
ILLEGAL (Note 9, 14)  
ILLEGAL (Note 9)  
ILLEGAL (Note 9)  
L
L
L
H
H
L
L
L
H
L
BA/CA/A10  
BA/CA/A10  
BA/RA  
READ/READA  
WRIT/WRITA  
ACT  
Write  
Recovering  
with AP  
H
H
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
X
H
H
L
H
L
L
X
H
L
H
L
X
H
H
L
L
H
L
BA, A10  
PRE/PALL  
REF/SELF  
MRS  
DESL  
NOP/BST  
READ/WRIT  
ILLEGAL  
ILLEGAL  
ILLEGAL  
Nop Enter idle after tRC  
Nop Enter idle after tRC  
ILLEGAL  
X
Op-Code  
X
X
X
X
X
X
H
L
X
X
X
X
X
X
X
X
X
Refreshing  
ACT/PRE/PALL ILLEGAL  
REF/SELF/MRS ILLEGAL  
L
X
H
H
H
DESL  
NOP  
BST  
Nop  
Nop  
ILLEGAL  
ILLEGAL  
Mode  
Register  
Accessing  
X
READ/WRIT  
ACT/PRE/PALL/  
REF/SELF/MRS  
L
L
X
X
X
ILLEGAL  
Remark H = High level, L = Low level, X = High or Low level (Don't care), AP = Auto Pre-charge  
Note 7: All entries assume that CKE was active (High level) during the preceding clock cycle.  
Note 8: If all banks are idle, and CKE is inactive (Low level), SDRAM will enter Power down mode.  
All input buffers except CKE will be disabled.  
Note 9: Illegal to bank in specified states;  
Function may be legal in the bank indicated by Bank Address (BA), depending on the state of  
that bank.  
Note 10: If all banks are idle, and CKE is inactive (Low level), SDRAM will enter Self refresh mode.  
All input buffers except CKE will be disabled.  
Note 11: Illegal if tRCD is not satisfied.  
Note 12: Illegal if tRAS is not satisfied.  
Note 13: Must satisfy burst interrupt condition.  
Note 14: Must satisfy bus contention, bus turn around, and/or write recovery requirements.  
Note 15: Must mask preceding data which don't satisfy tDPL  
.
Note 16: Illegal if tRRD is not satisfied.  
May. 2007  
www.eorex.com  
17/19  
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