EN5322QI
Figure 5. Typical Application Circuit with External Resistor Divider.
(NOTE: Enable can be separated from PVIN if the application requires it)
Application Information
values is indeterminate. These pins must not
be left floating.
Setting the Output Voltage
To provide the highest degree of flexibility in
choosing output voltage, the EN5322QI uses a
3 pin VID (Voltage ID) output voltage select
arrangement. This allows the designer to
choose one of seven preset voltages, or to use
an external voltage divider. Figure 4 shows a
typical application circuit with VID codes.
Internally, the output of the VID multiplexer
sets the value for the voltage reference DAC,
which in turn is connected to the non-inverting
input of the error amplifier. This allows the use
of a single feedback divider with constant loop
gain and optimum compensation, independent
of the output voltage selected.
Table 1. VID voltage select settings.
VS2
0
VS1
0
VS0
0
VOUT
3.3V
0
0
1
2.5V
1.8V
1.5V
1.25V
1.2V
0.8V
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
User
Selectable
Table 1 shows the various VS0-VS2 pin logic
states and the associated output voltage
levels. A logic “1” indicates a connection to VIN
or to a “high” logic voltage level. A logic “0”
indicates a connection to ground or to a “low”
logic voltage level. These pins can be either
hardwired to VIN or GND or alternatively can be
driven by standard logic levels. Logic low is
defined as VLOW ≤ 0.4V. Logic high is defined
as VHIGH ≥ 1.4V. Any level between these two
External Voltage Divider
As described above, the external voltage
divider option is chosen by connecting the
VS0, VS1, and VS2 pins to VIN or logic “high”.
The EN5322QI uses a separate feedback pin,
VFB, when using the external divider. VSENSE
must be connected to VOUT as indicated in
Figure 5.
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11
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03454
4/24/2009
Rev:A
ENPIRION [ ENPIRION, INC. ]
