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EPVP6800 参数 Datasheet PDF下载

EPVP6800图片预览
型号: EPVP6800
PDF下载: 下载PDF文件 查看货源
内容描述: VFD控制器 [VFD Controller]
分类和应用: 控制器局域网
文件页数/大小: 47 页 / 323 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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ePVP6800  
VFD Controller  
7.2.5 R4 (RAM Selection For Common Registers R20 ~ R3F))  
(RAM Selection Register)  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
RB1  
RB0  
RSR5  
R/W  
RSR4  
R/W  
RSR3  
R/W  
RSR2  
R/W  
RSR1  
R/W  
RSR0  
R/W  
R/W-0  
R/W-0  
Bit 0 ~ Bit 5 (RSR0 ~ RSR5) : Indirect address for common Registers R20 ~ R3F.  
RSR bits are used to select up to 32 registers (R20 to R3F) in the  
indirect address mode.  
Bit 6 ~ Bit 7 (RB0 ~ RB1) :  
Bank selection bits for common Registers R20 ~ R3F.  
These selection bits are used to determine which bank is activated  
among the 4 banks for 32 register (R20 to R3F).  
Refer to Section 7.1 Operation Registers Configuration for details.  
7.2.6 R5 (PORT5 Output Data, Program Page Selection)  
a) PAGE 0 (PORT5 Output Data Register for HV or General Purpose Input pins:  
p54~p57)  
Bit 7  
P57  
W-0  
Bit 6  
P56  
W-0  
Bit 5  
P55  
W-0  
Bit 4  
P54  
W-0  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
-
-
-
-
-
-
-
-
b) PAGE 1 (Program ROM Page Register)  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
PS1  
Bit 0  
PS0  
-
-
-
-
-
-
-
-
-
-
-
-
R/W-0  
R/W-0  
Bit 0 ~ Bit 3 (PS0 ~ PS3) : Program page selection bits  
Program Memory  
Page (Address)  
PS1 PS0  
0
0
0
1
Page 0  
Page 1  
PAGE instruction is used to select the program page to be accessed. The selected program page is  
maintained by Elan compiler. PAGE instruction will change your program by inserting the instruction  
within program.  
10 of 47 11. 28.2004 (V1.23)  
This specification is subject to change without further notice.  
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