ePVP6800
VFD Controller
7.2.10 R9 (PORT9 I/O Data, Data RAM Data Buffer) ,Counter2_HB Data
a) PAGE 0 (PORT9 I/O Data Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
P93
R/W
Bit 2
P92
R/W
Bit 1
P91
R/W
Bit 0
P90
R/W
-
-
-
-
-
-
-
-
Bit 0 ~ Bit 7 (P90 ~ P97) : 8-bit PORT9(0~7) I/O data register
You can use IOC register to define input or output each bit, and to define
the pull high condition.
Bit 0:
1. P90
: can be defined as Input/Output
: can be defined as Output
2. LED0
3. IR Input
: can be defined as Input and IR is enabled
(when IOCF Bit7 is set to 1)
Bit 1 ~ Bit3:
1. P91~P93
: can be defined as Input/Output
2. LED1~LED3 : can be defined as Output
3. INT1~INT3 : can be defined as Input
b) PAGE 1 (Data RAM Data Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RAM_D7 RAM_D6 RAM_D5 RAM_D4 RAM_D3 RAM_D2 RAM_D1 RAM_D0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (RAM_D0 ~ RAM_D7) : Data RAM’s data
c) PAGE 2 (Counter2 High Byte Data Register)
Bit 7
CN215
R/W
Bit 6
CN214
R/W
Bit 5
CN213
R/W
Bit 4
CN212
R/W
Bit 3
CN211
R/W
Bit 2
CN210
R/W
Bit 1
CN29
R/W
Bit 0
CN28
R/W
Bit 0 ~ Bit 7 (CN28 ~ CN215) : Counter2_HB's buffer that you can read and write.
Counter2 is a 16-bit up-counter with 8-bit prescaler that allows you to
use R9 PAGE2 to preset and read the counter (write ꢂpreset). After
an interruption, it will reload the preset value.
12 of 47 11. 28.2004 (V1.23)
This specification is subject to change without further notice.
ELAN [ ELAN MICROELECTRONICS CORP ]
