ePVP6800
VFD Controller
6 Pin Descriptions
Pin No.
Pin Name
I/O #
Description
Note
32
VDD
-
1
Logic power supply
General Purpose I/O pins:
1. Key data input to these pins is latched at the end of display
cycle.
Schmitt
Pull-up
24 – 27
GPIOC0 – GPIOC3
I/O 4
2. These pins constitute 4-bit general-purpose input/output port.
3. Programmable Internal Pull-High
4. Wake-up Function
1-9
GR1 – GR9
GR10/SG8 – GR1 /SG7
SG6 – SG5
O
O
O
9
2
2
1. High voltage grid output
∼
(B Cell)
10-11
1. High voltage grid output
(B Cell)
2. High voltage segment output
12-13
1. High voltage grid output
(A Cell)
2. High voltage segment output
1. High voltage segment output
14-17
SG4/KS4 – SG1/KS1 I/O 4 2. Matrix key scan output
3. General Purpose Input pins: p54~p57
(C Cell)
1. General Purpose I/O pins
2. LED output pin (20mA)
Schmitt
Pull-up
GPIO90/LED0 –
GPIO93/LED3
20 – 23
I/O 4 3. IR Detector
4. Interrupt Function
5. Programmable Internal Pull-High
Phase Lock Loop Capacitor (connect a Capacitor 0.01 to 0.047u
to the Ground).
28
PLLC
I
1
29
30
31
19
18
OSCI
OSCO
VSS
I
O
-
1
1
1
1
1
Crystal Oscillator input pin (32, 768Hz)
Crystal Oscillator output pin (32, 768Hz)
Connect this pin to GND of the system
Low active RESET signal input
/RESET
VEE
I
Schmitt
-
Pull-down level (VDD-(-40V)max)
This specification is subject to change without further notice.
11.28.2004 (V123) 5 of 47
ELAN [ ELAN MICROELECTRONICS CORP ]
