EM78P5840N/41N/42N
8-Bit Microcontrollers
7.10 PWM (Pulse Width Modulation)
7.10.1 Overview
In PWM mode, both PWM1 and PWM2 pins produce up to 10-bit resolution PWM
output (see Figure 7-8a below for its functional block diagram). A PWM output has a
period and a duty cycle, and it keeps the output in high. The baud rate of the PWM is
the inverse of the period. Figure 6-8b below illustrates the relationships between a
period and a duty cycle.
latch
To PWM1IF
DL2H + DL2L
DT2H
+
Fosc
DT2L
Duty Cycle
Match
1:2
1:8
1:32
1:64
Comparator
PWM1
MUX
R
S
Q
TMR1H + TMR1L
reset
IOC6
Comparator
T1P0 T1P1 T1EN
Period
Match
PRD1
Data Bus
Data Bus
latch
To PWM2IF
DL2H + DL2L
DT2H
+
DT2L
Duty Cycle
Match
T2P0 T2P1 T2EN
Comparator
PWM2
Fosc
R
S
Q
TMR2H + TMR2L
1:2
1:8
1:32
1:64
reset
MUX
IOC6
Comparator
Period
Match
PRD2
Figure 7-8a Dual PWM Functional Block Diagram
Period
Duty Cycle
PRD1 = TMR1
DT1 = TMR1
Figure 7-8b PWM Output Timing
38 •
Product Specification (V1.0) 04.25.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
