EM78P510N
8-Bit Microcontrollers
4. UART Receive operation (8 bits data with parity and stop bit):
START
bit
Parity STOP START
bit bit bit
D0
D2
D1
D1
Dn
D0
D2
RXD
pin
Synchronization
Sample
Timing
Clear by hardware when
read data fromUARTRx
URBF
Clear by
software
URTIF
PRERR
OVERR
FMERR
6.12 SPI (Serial Peripheral Interface)
6.12.1 Overview & Features
Overview:
Figures 6-20 and 6-21 shows how the EM78P510N communicates with other devices
through SPI module. If the EM78P510N is a master controller, it sends clock through
the SCK pin. A couple of 8-bit data are transmitted and received at the same time.
However, if the EM78P510N is defined as a slave, its SCK pin could be programmed as
an input pin. Data will continue to be shifted based on both the clock rate and the
selected edge. You can also set SPIS bit 7 (DORD) to determine the SPI transmission
order, SPIC Bit 3 (SDOC) to control the SO pin after serial data output status and SPIS
Bit 6 (TD1), Bit 5 (TD0) determines the SO status output delay times.
Features:
Operation in either Master mode or Slave mode
Full duplex, three-wire synchronous communication
Programmable baud rates of communication
Programming clock polarity, (RD Bit 7)
Interrupt flag available for the read buffer full
SPI transmission order
After serial data output SDO status select
SDO status output delay times
Up to 8 MHz (maximum) bit frequency
76 •
Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
