EM78P510N
8-Bit Microcontrollers
Status
Affected
Binary Instruction
Hex
Mnemonic
Operation
0 0111 11rr rrrr
0 100b bbrr rrrr
0 101b bbrr rrrr
0 110b bbrr rrrr
0 111b bbrr rrrr
07rr
0xxx
0xxx
0xxx
0xxx
JZ R
R+1 → R, skip if zero
0 → R(b)
None
None
None1
None
None
BC R,b
BS R,b
JBC R,b
JBS R,b
1 → R(b)
if R(b)=0, skip
if R(b)=1, skip
PC+1 → [Stack],
(Page, k) → PC
1 00kk kkkk kkkk
1kkk
CALL k
None
1110 1010 kkkk
PC+1 → [Stack],
K → PC
1EAkkkk
1kkk
LCALL k
JMP k
None
None
None
k
kkkk kkkk kkkk
1 01kk kkkk kkkk
1110 1011 kkkk
(Page, k) → PC
1EBkkkk
LJMP k
K → PC
k
kkkk kkkk kkkk
1 1000 kkkk kkkk
1 1001 kkkk kkkk
1 1010 kkkk kkkk
1 1011 kkkk kkkk
1 1100 kkkk kkkk
1 1101 kkkk kkkk
1 1110 0kkk kkkk
1 1111 kkkk kkkk
18kk
19kk
1Akk
1Bkk
1Ckk
1Dkk
1E0K
1Fkk
MOV A,k
OR A,k
k → A
None
Z
A ∨ k → A
AND A,k
XOR A,k
RETL k
SUB A,k
BANK k
ADD A,k
A & k → A
Z
A ⊕ k → A
k → A, [Top of Stack] → PC
k-A → A
Z
None
Z, C, DC
None
Z, C, DC
kÆR5(2:0)
k+A → A
Note: 1 This instruction cannot operate under an interrupt flag.
94 •
Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
