EM78P350N
8-Bit Microprocessor with OTP ROM
PCRD
P
R
Q
D
CLK
PCWR
_
Q
C
L
P
R
PORT
D
IOD
Q
CLK
PDWR
_
Q
C
L
PDRD
M
U
X
0
1
Note: Pull-high and Open-drain are not shown in the figure.
Fig. 6-3 I/O Port and I/O Control Register Circuit for Port 5, Port 7, and Port 8
PCRD
P
R
Q
D
CLK
PCWR
_
Q
C
L
P52, /INT0
P53,/INT1
P
R
IO
D
Q
D
PORT
CLK
_
Q
PDWR
C
L
Bit 6 of IOCE0
M
U
X
0
1
P
R
D
Q
CLK
_
Q
C
L
PDRD
TI 0
INT
Note: Pull-high and Open-drain are not shown in the figure.
Fig. 6-4 I/O Port and I/O Control Register Circuit for P52 (/INT0) and P53 (/INT1)
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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