EM78P350N
8-Bit Microprocessor with OTP ROM
6.3 TCC/WDT and Prescaler
There are two 8-bit counters available as prescalers for the TCC and WDT respectively.
The PST0 ~ PST2 bits of the CONT register are used to determine the ratio of the TCC
prescaler, and the PWR0 ~ PWR2 bits of the IOCE0 register are used to determine the
prescaler of WDT. The prescaler counter is cleared by the instructions each time such
instructions are written into TCC. The WDT and prescaler will be cleared by the
“WDTC” and “SLEP” instructions. Fig. 6-2 (next page) depicts the block diagram of
TCC/WDT.
TCC (R1) is an 8-bit timer/counter. The TCC clock source can be an internal clock or
external signal input (edge selectable from the TCC pin). If TCC signal source is from
an internal clock, the TCC will be incremented by 1 at every instruction cycle (without
prescaler). Referring to Fig. 6-2, CLK=Fosc/2 or CLK=Fosc/4 is dependent to the Code
Option bit <CLKS>. CLK=Fosc/2 if the CLKS bit is "0," and CLK=Fosc/4 if the CLKS bit
is "1." If the TCC signal source is from an external clock input, TCC will be incremented
by 1 at every falling edge or rising edge of the TCC pin. The TCC pin input time length
(kept in High or Low level) must be greater than 1CLK.
NOTE
The internal TCC will stop running when sleep mode occurs. However, during AD
conversion, when TCC is set to “SLEP” instruction, if the ADWE bit of RE register is
enabled, the TCC will keep on running.
The watchdog timer is a free running on-chip RC oscillator. The WDT will keep on
running even when the oscillator driver has been turned off (i.e., in sleep mode).
During normal operation or sleep mode, a WDT time-out (if enabled) will cause the
device to reset. The WDT can be enabled or disabled at any time during normal mode
through software programming. Refer to WDTE bit of IOCE0 register (Section 6.2.10
IOCE0 (WDT Control Register). With no prescaler, the WDT time-out duration is
approximately 18ms.1
1
VDD=5V, Setup time period = 16.5ms ± 30%.
VDD=3V, Setup time period = 18ms ± 30%.
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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