EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
6.1.6 R5 ~ R6 (Port 5 ~ Port 6)
R5 & R6 are I/O registers
The upper two bits of R5 are fixed to “0” (if EM78P342N is selected).
Only the lower six bits of R5 are available (this applies to EM78P342N only
since EM78P343N can use all the bits)
6.1.7 R7 (Port 7)
Bit
7
6
5
4
3
2
1
0
EM78P342N/343N
ICE342N
‘0’
C3
‘0’
C2
‘0’
C1
‘0’
C0
‘0’
‘0’
I/O
I/O
I/O
I/O
RCM1 RCM0
NOTE
R7 is an I/O register
For EM78P342N/343N, only the lower 2 bit of R7 is available.
Bit 7 ~ Bit 2:
[With EM78P342N/343N]: Unimplemented, read as ‘0’.
[With Simulator (C3~C0, RCM1, & RCM0)]: IRC calibration bits in IRC oscillator
mode. In IRC oscillator mode of ICE342N simulator, these
are the IRC mode selection bits and IRC calibration bits.
Bit 7 ~ Bit 4 (C3 ~ C0): Calibrator of internal RC mode
C3
C2
C1
C0
Frequency (MHz)
(1-36%) x F
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
(1-31.5%) x F
(1-27%) x F
(1-22.5%) x F
(1-18%) x F
(1-13.5%) x F
(1-9%) x F
(1-4.5%) x F
F (default)
(1+4.5%) x F
(1+9%) x F
(1+135%) x F
(1+18%) x F
(1+22.5%) x F
(1+27%) x F
(1+31.5%) x F
Note: 1. Frequency values shown are theoretical and taken from an instance of a high frequency mode.
Hence, they are shown for reference only. Definite values depend on the actual process.
2. Similar way of calculation is also applicable for low frequency mode.
Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)
• 11
ELAN [ ELAN MICROELECTRONICS CORP ]
