EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
6.1.3.1 Data Memory Configuration
Address
R Page Registers
IOCX0 Page Registers
IOCX1 Page Registers
Reserve
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
RA
RB
RC
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
(Indirect Addressing Register)
(Timer Clock Counter)
(Program Counter)
(Status Register)
(RAM Select Register)
(Port 5)
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
IOC50
IOC60
IOC70
IOC80
IOC90
IOC51
(I/O Port Control Register)
(I/O Port Control Register)
(I/O Port Control Register)
(TCCA Counter)
IOC61 (TCCB LSB Counter)
(Port 6)
(TCCB HSB Counter)
(TCCC Counter)
(Port 7)
IOC71
IOC81
IOC91
IOCA1
IOCB1
(Comparator and TCCA
Control Register)
(ADC Input Select Register
(ADC Control Register)
(TCCB and TCCC
Control Register)
(IR and TCCC Scale
Control Register)
(Low-Time Register)
(High-Time Register)
(ADC Offset Calibration
Register)
IOCA0
IOCB0
IOCC0
IOCD0
IOCE0
(Pull-down Control
Register)
(High-Time and Low-Time
Scale Control Register)
(Converted value
AD11~AD4 of ADC)
(Converted value
AD11~AD8 of ADC)
(Converted value
AD7~AD0 of ADC)
(Open-drain Control
Register)
IOCC1 (TCC Prescaler Control)
IOCD1 (LVD Control Register)
(Pull-high Control Register)
RD
RE
(WDT Control Register and
Interrupt Mask Register 2)
(Interrupt Status 2 and
Wake-up Control Register
(High Output Sink Current)
(Pull-high Control Register)
IOCE1
IOCF1
RF (Interrupt Status Register 1)
IOCF0
(Interrupt Mask Register 1)
10
1F
General Registers
20
：
Bank 0
Bank 1
3F
Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)
• 9
ELAN [ ELAN MICROELECTRONICS CORP ]
