EM78P259N/260N
8-Bit Microprocessor with OTP ROM
PCRD
P
R
Q
D
CLK
PCWR
_
Q
C
L
P50 ~ P57
PORT
P
R
IOD
Q
D
CLK
_
Q
PDWR
C
L
M
U
X
0
1
PDRD
TI n
P
R
D
Q
CLK
_
Q
C
L
NOTE: Pull-high (down) is not shown in the figure.
Fig. 6-4 I/O Port and I/O Control Register Circuit for Port 50 ~ P57
IO C F.1
R F.1
T I
T I
0
1
T I
8
Fig. 6-5 Port 5 Block Diagram with Input Change Interrupt/Wake-up
Product Specification (V1.0) 06.16.2005
• 31
(This specification is subject to change without further notice)