EM78P259N/260N
8-Bit Microprocessor with OTP ROM
CLK (Fosc/2 or Fosc/4)
0
Data Bus
8-Bit Counter (IOCC1)
MUX
SYNC
2 cycles
TCC Pin
TCC (R1)
1
8 to 1 MUX
Prescaler
TE (CONT)
TCC overflow
interrupt
TS (CONT)
PSR2~0
(CONT)
WDT
8-Bit counter
8 to 1 MUX
Prescaler
WDTE
(IOCE0)
PSW2~0
(IOCE0)
WDT Time out
Fig. 6-1 TCC and WDT Block Diagram
6.4 I/O Ports
The I/O registers (Port 5, Port 6, and Port 7) are bi-directional tri-state I/O ports. Port 5
is pulled-high and pulled-down internally by software. Likewise, P6 has its open-drain
output through software. Port 5 features an input status changed interrupt (or wake-up)
function. Each I/O pin can be defined as "input" or "output" pin by the I/O control
register (IOC5 ~ IOC7). The I/O registers and I/O control registers are both readable
and writable. The I/O interface circuits for Port 5, Port 6, and Port7 are illustrated in
Figures 6-2, 6-3, 6-4, & 6-5 (see next page).
Product Specification (V1.0) 06.16.2005
• 29
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
