EM78P259N/260N
8-Bit Microprocessor with OTP ROM
6.1.9 R9 (ADCON: ADC Control Register)
7
6
5
4
3
2
1
0
VREFS
CKR1
CKR0
ADRUN
ADPD
–
ADIS1
ADIS0
Bit 7 (VREFS): The input source of the Vref of the ADC
0 = The Vref of the ADC is connected to Vdd (default value), and the
P54/VREF pin carries out the function of P54
1 = The Vref of the ADC is connected to P54/VREF
NOTE
ꢀ
ꢀ
The P54/TCC/VREF pin cannot be applied to TCC and VREF at the same time.
If P53/TCC/VREF acts as VREF analog input pin, then CONT Bit 5 “TS” must be
“0.”
The P54/TCC/VREF pin priority is as follows:
P53/TCC/VREF Pin Priority
High
Medium
TCC
Low
P54
VREF
Bit 6 & Bit 5 (CKR1 & CKR0): The prescaler of oscillator clock rate of ADC
00 = 1: 4 (default value)
01 = 1: 16
10 = 1: 64
11 = 1: WDT ring oscillator frequency
CKR0:CKR1
Operation Mode
Fsco/4
Max. Operation Frequency
00
01
10
11
1 MHz
4 MHz
16MHz
–
Fsco/16
Fsco/64
Internal RC
Bit 4 (ADRUN): ADC starts to RUN.
1 = an AD conversion is started. This bit can be set by software
0 = Reset upon completion of the conversion. This bit cannot be
reset through software
Bit 3 (ADPD): ADC Power-down mode
1 = ADC is operating
0 = Switch off the resistor reference to save power even while the
CPU is operating
Bit 2:
Not used
12 •
Product Specification (V1.0) 06.16.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
