EM78860
8-BIT MICRO-CONTROLLER
PCRD
PR
Q
D
CLK
PCWR
Q
CL
PR
PORT
D
Q
Q
IOD
CLK
CL
PDWR
PDRD
0
M
U
X
1
Fig. 11 The circuit of I/O port and I/O control register
RESET and Wake-up
The RESET can be caused by
(1) Power on reset, or Voltage detector
(2) WDT timeout. (if enabled and in GREEN or NORMAL mode)
Note that only Power on reset, or only Voltage detector in Case(1) is enabled in the system by CODE Option bit.
If Voltage detector is disabled, Power on reset is selected in Case (1). Refer to Fig. 12.
VDD
D
Q
CLK
Oscillator
CLK
CLR
Power-on
Reset
1
0
M
U
X
Voltage
Detector
/Enable
Code
Option
WDTE
WDT timeout
RESET
18 ms
WDT
Fig. 12 Block diagram of Reset of controller
* This specification are subject to be changed without notice.
14
6.24.1998
ELAN [ ELAN MICROELECTRONICS CORP ]
