EM78808
8-bit Micro-controller
Presents a logic high when a received tone-pair has been registered and the output latch updated; returns to
logic low when the voltage on St/GT falls below V tst.
0/1 ꢂData invalid/data valid
Bit 7(DREN) : DTMF receiver power control
0/1 ꢂpower down/ power up
Be sure open main clock before using DTMF receiver circuit . A logic low applied to DREN will shut
down power of the device to minimize the power consumption in a standby mode. It stops functions of the
filters.
In many situations not requiring independent selection of receive and pause, the simple steering circuit of
is applicable. Component values are chosen according to the following formulae:
t REC = t DP + t GTP t ID = t DA + t GTA
The value of t DP is a parameter of the device and t REC is the minimum signal duration to be recognized by the
receiver. A value for C of 0.1 uF is recommended for most applications, leaving R to be selected by the designer.
For example, a suitable value of R for a t REC of 30mS would be 300k.
Different steering arrangements may be used to select independently the guard-times for tone-present (t GTP )
and tone-absent (t GTA ). This may be necessary to meet system specifications which place both accept and
reject limits on both tone duration and inter digital pause.
Guard-time adjustment also allows the designer to tailor system parameters such as talk off and noise
immunity. Increasing t REC improves talk-off performance, since it reduces the probability that tones simulated
by speech will maintain signal condition for long enough to be registered. On the other hand, a relatively short t
REC with a long t DO would be appropriate for extremely noisy environments where fast acquisition time and
immunity to drop-outs would be required.
VDD
VDD
C
ST/GT
EST
R
Fig.21. DTMF receiver delay time control
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* This specification is subject to change without notice.
8/1/2004 (V3.1)
37
ELAN [ ELAN MICROELECTRONICS CORP ]
