EM78808
8-bit Micro-controller
0 ꢂselect normal P84 ~ P87 for high nibble PORT8
1 ꢂselect SEG68 ~ SEG71 output for LCD SEGMENT output.
Bit 2 (P9SL) : Switch low nibble I/O PORT9 or LCD segment output for share pins SEGxx/P9x pins
0 ꢂselect normal P90 ~ P93 for low nibble PORT9
1 ꢂselect SEG72 ~ SEG75 output for LCD SEGMENT output.
Bit 3 (P9SH) : Switch high nibble I/O PORT9 or LCD segment output for share pins SEGxx/P9x pins
0 ꢂselect normal P94 ~ P97 for high nibble PORT9
1 ꢂselect SEG76 ~ SEG79 output for LCD SEGMENT output.*Bit 4:general register
Bit 4 (CWPWR) : Power control of Call Waiting circuit
1/0 ꢂenable circuit /disable circuit
Bit 5~Bit 7(IOC55~IOC57) : PORT5 I/O direction control registers.
0 ꢂput the relative I/O pin as output
1 ꢂput the relative I/O pin into high impedance
PAGE1 (Key tone control, CDAS, LCD bias control)
7
6
5
4
3
2
1
0
KT1
KT0
KTS
CDAS
BIAS3
BIAS2
BIAS1
BIAS0
Bit 0~Bit 3(BIAS0~BIAS3) : LCD operation voltage selection
V1 = VDD * (5 - n/15)/5
(BIAS3 to BIAS0) V1 voltage
Example (VDD=5V)
VDD * (5-0/15)/5 5V
VDD * (5-1/15)/5 4.93V
VDD * (5-2/15)/5 4.86V
VDD * (5-3/15)/5 4.80V
VDD * (5-4/15)/5 4.73V
0000
0001
0010
0011
0100
:
:
:
1101
1110
1111
VDD * (5-13/15)/5 4.13V
VDD * (5-14/15)/5 4.07V
VDD * (5-15/15)/5 4.0V
COMs
SEGs
BIAS
MUX
LCD driver
for
COM and SEG
VC1 ~ VC5
generator
4
BIAS3 to BIAS0
VC1 ~ VC5
Fig.18 The relation between bias and V1 to V5
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* This specification is subject to change without notice.
8/1/2004 (V3.1)
31