EM78468
8-BIT Microcontroller
INT_EDGE = ”1”: Interrupt on falling edge of P5.4/INT0 pin
Bit 6 (INT): INT enable flag, this bit is read only
INT = ”0”: interrupt masked by DISI or hardware interrupt
INT = “1”: interrupt enabled by ENI/RETI instructions
Bit 5 (TS): TCC signal source
TS = “0”: internal instruction cycle clock
TS = “1”: transition on TCC pin, TCC period > internal instruction clock period
Bit 4 (TE): TCC signal edge
TE = ”0”: increment by TCC pin rising edge
TE = “1”: increment by TCC pin falling edge
Bit 3~0 (PSRE, TCCP2~TCCP0): TCC pre-scaler bits.
PSRE
TCCP2
TCCP1
TCCP0
TCC Rate
1:1
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
4.2.15 IOC81/WDTCR (WDT Control Register)
(Address: 08h, Bit 0 of R5 = “1”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
--
--
--
--
WDTE
WDTP2 WDTP1 WDTP0
Bit 7 ~ 4:Not used
Bit 3 (WDTE): watchdog timer enable. This control bit is used to enable the Watchdog
timer,
WDTE = “0”: Disable WDT function.
WDTE = “1”: enable WDT function.
Product Specification (V1.1) 04.11.2005
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
