EM78468
8-BIT Microcontroller
4.3 TCC and WDT Pre-scaler
Two 8-bit counters are available as pre-scalers for the TCC (Time Clock Counter) and
WDT (Watch Dog Timer). The TCCP2~TCCP0 bits of the IOC71 register are used to
determine the ratio of the TCC pre-scaler. Likewise, the WDTP2~WDTP0 bits of the
IOC81 register are used to determine the WDT pre-scaler. The TCC pre-scaler
(TCCP2~TCCP0) is cleared by the instructions each time they are written into TCC,
while the WDT pre-scaler is cleared by the “WDTC” and “SLEP” instructions. Fig.7
depicts the circuit diagram of TCC and WDT.
R1 (TCC) is an 8-bit timer/counter. The clock source of TCC can be selected by internal
instruction clock or external signal input (edge selectable from the TCC control register).
If TCC signal source is from internal instruction clock, TCC will increase by 1 at every
instruction cycle (without pre-scaler). If TCC signal source is from external clock input,
TCC will increase by 1 at every falling edge or rising edge of the TCC pin.
The watchdog timer is a free running sub-oscillator. The WDT will keep on running even
after the oscillator driver has been turned off. During Normal mode, Green mode, or Idle
mode operation, a WDT time-out (if enabled) will cause the device to reset. The WDT
can be enabled or disabled at any time during the Normal mode and Green mode by
software programming. Refer to WDTE bit of IOC81 register. The WDT time-out period is
equal to (pre-scaler*256/ (Fs/2)).
Data Bus
TCC (R1)
Instruction Clock = Fosc /2
Fosc: CPU operate frequency
TCC
MUX
Prescaler
8 to 1 MUX
Pin
PSRE TCCP2~0
(IOC71) (IOC71)
TCCoverflow interrupt
TE (IOC71)
TS (IOC71)
Fig. 7(a) Block Diagram of TCC
Product Specification (V1.1) 04.11.2005
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
