EM78468
8-BIT Microcontroller
4.1.4 R3/SR (Status Register)
(Address: 03h)
Bit 7
--
Bit 6
Bit 5
PS0
Bit 4
T
Bit 3
P
Bit 2
Z
Bit 1
DC
Bit 0
C
PS1
Bit 7: Not used
Bit 6, 5 (PS1 ~ PS0): Page select bits
PS1
0
0
1
PS0
0
1
0
ROM Page (Address)
Page 0 (000H ~ 3FFH)
Page 1 (400H ~ 7FFH)
Page 2 (800H ~ BFFH)
Page 3 (C00H ~ FFFH)
1
1
PS0~PS1 are used to select a ROM page. User can use PAGE instruction (e.g. PAGE 1)
or set PS1~PS0 bits to change ROM page. When executing a "JMP", "CALL", or other
instructions which causes the program counter to be changed (e.g. MOV R2, A),
PS0~PS1 are loaded into the 11th and 12th bits of the program counter where it selects
one of the available program memory pages. Note that RET (RETL, RETI) instruction
does not change the PS0~PS1 bits. That is, the return will always be to the page from
where the subroutine was called, regardless of the current setting of PS0~PS1 bits.
Bit 4 (T): Time-out bit. Set to 1 by the "SLEP" and "WDTC" commands or during power
up and reset to 0 by WDT timeout.
EVENT
T
0
0
1
1
1
P
0
1
0
1
1
REMARK
WDT wake up from sleep mode
WDT time out (not sleep mode)
/RESET wake up from sleep
Power up
Low pulse on /RESET
X: don't care
Bit 3 (P): Power down bit. Set to 1 during power on or by a "WDTC" command and reset
to 0 by a "SLEP" command.
Bit 2 (Z): Zero flag
Bit 1 (DC): Auxiliary carry flag.
Bit 0 (C): Carry flag
4.1.5
R4/RSR (RAM Select Register)
(Address: 04h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RBS1
RBS0
RSR5
RSR4
RSR3
RSR2
RSR1
RSR0
Bits 7 ~ 6 (RBS1 ~ RBS0) determine which bank is activated among the 4 banks. See
the configuration of the data memory in Fig.4. Use BANK instruction (e.g. BABK 1) to
change bank.
12 •
Product Specification (V1.1) 04.11.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
