EM78468
8-BIT Microcontroller
R3
PC A11 A10 A9 A8 A7
~
A0
000H
003H
006H
009H
00CH
00FH
012H
Resetvector
TCC ov erf lowinterrupt v ector
ExteralINT0 pininterrupt vector
ExteralINT1 pininterrupt vector
Counter 1 underf low interrupt v ector
Counter 2 underf low interrupt v ector
CALL
00 PAGE0 0000~03FF
RET
RETL
RETI
01 PAGE1 0400~07FF
10 PAGE2 0800~0BFF
11 PAGE3 0C00~0FFF
STACK LEVEL1
STACK LEVEL2
STACK LEVEL3
STACK LEVEL4
STACK LEVEL5
STACK LEVEL6
STACK LEVEL7
STACK LEVEL8
high pulse width timer underf low interrupt v ector
low pulse width timer underf low interrupt v ector
Port 6,Port8 pin change wake-up interrupt v ector
015H
018H
On-ChipProgrammemory
FFFH
Fig. 3 Program Counter Organization
ADDRESS
IAR (Indirect Addressing Register)
0 0
0 1
0 2
0 3
0 4
0 5
0 6
0 7
0 8
0 9
0 A
0 B
0 C
0 D
0 E
0 F
TCC (Time Clock Counter)
R5 bit 0 -> 0
controlregisterpage 0
R5 bit 0 -> 1
controlregisterpage 1
PC (Program Counter)
SR (Status Register)
RSR (RAM select register)
PORT5 (Port 5 & IOCPAGE Control)
PORT6 (Port6 I/O data register)
PORT7 (Port7 I/O data register)
PORT8 (Port8 I/O data register)
LCDCR (LCD control register)
LCD_ADDR (LCD address)
P5CR (Port5 I/O & LCD segment control)
P6CR (Port6 I/O control register)
WUCR (Wake up & P5.7 sink current)
TCCCR (TCC &INT0 control register)
WDTCR (WDT control register)
P7CR (Port7 I/O control register)
P8CR (Port8 I/O control register)
RAM_ADDR (128 byte RAM address)
RAM_DB (128 byte RAM data buffer)
CNT1PR (Counter 1 preset register)
CNT2PR (Counter 2 preset register)
HPWTPR (High-pulse width timer preset)
LPWTPR (Low-pulse width timer preset)
IMR (interrupt mask register)
CNT12CR (Counter 1,2 control register)
HLPWTCR (high/low pulse width timer control)
P6PH (Port 6 pull-high control register)
P6OD (Port 6 open drain control register)
P8PH (Port 8 pull-high control register)
P6PL (Port 6 pull-low control register)
LCD_DB (LCD data buffer)
CNTER (Counter enable register)
SBPCR (System, Booster , PLL control)
IRCR (IR, Pin of IR;INT0/1;TCC control)
ISR (interrupt status register)
1 0
|
16 byte common register
LCD RAM 4*32 bits
1 F
2 0
|
3 F
bank 0 ~ bank 3
32 byte common register
128 byte data RAM
Fig. 4 Data Memory Configuration
Product Specification (V1.1) 04.11.2005
• 11
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
