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EM78156EAS 参数 Datasheet PDF下载

EM78156EAS图片预览
型号: EM78156EAS
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与MASK ROM [8-Bit Microcontroller with MASK ROM]
分类和应用: 微控制器光电二极管局域网有原始数据的样本ROM
文件页数/大小: 48 页 / 420 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78156E  
8-Bit Microcontroller with MASK ROM  
internal clock, TCC will increase by 1 at every instruction cycle (without prescaler).  
Referring to Fig. 5, CLK=Fosc/2 or CLK=Fosc/4 application is determined by the  
CODE Option bit CLK status. CLK=Fosc/2 is used if CLK bit is "0", and  
CLK=Fosc/4 is used if CLK bit is "1". If TCC signal source comes from external  
clock input, TCC is increased by 1 at every falling edge or rising edge of TCC pin.  
The watchdog timer is a free running on-chip RC oscillator. The WDT will keep on  
running even when the oscillator driver has been turned off (i.e. in sleep mode).  
During normal operation or sleep mode, a WDT time-out (if enabled) will cause the  
device to reset. The WDT can be enabled or disabled any time during normal  
mode by software programming. Refer to WDTE bit of IOCE register. Without  
prescaler, the WDT time-out period is approximately 18 ms1 (default).  
Data Bus  
CLK(=Fosc/2 or Fosc/4)  
0
1
0
TCC  
Pin  
M
U
X
M
U
X
SYNC  
2 cycles  
TCC (R1)  
1
TE  
TCC overflow interrupt  
TS  
PAB  
0
1
M
U
X
8-bit Counter  
M
U
X
IOCA  
WDT  
WTE  
PAB  
PAB  
(in IOCE)  
8-to-1 MUX  
Initial  
value  
PSR0~PSR2  
0
1
MUX  
WDT time-out  
PAB  
Fig. 5 Block Diagram of TCC and WDT  
4.4 I/O Ports  
The I/O registers, both Port 5 and Port 6, are bi-directional tri-state I/O ports. Port 6 can  
be pulled high internally by software. In addition, Port 6 can also have open-drain  
output by software. Input status change interrupt (or wake-up) function on Port 6. P50  
~ P52 and P60 ~ P63 pins can be pulled down by software. Each I/O pin can be  
defined as "input" or "output" pin by the I/O control register (IOC5 ~ IOC6). P50~P51  
are the R-option pins enabled by setting the ROC bit in the IOCE register to 1. When  
the R-option function is used, it is recommended that P50~P51 are used as output pins.  
When R-option is in enable state, P50~P51 must be programmed as input pins. Under  
1 <Note>: Vdd = 5V, set up time period = 16.8ms ± 30%  
Vdd = 3V, set up time period = 18ms ± 30%  
12 •  
Product Specification (V1.3) 07.29.2004  
(This specification is subject to change without further notice)  
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