EM78156E
8-Bit Microcontroller with MASK ROM
4.2 Special Purpose Registers
4.2.1 A (Accumulator)
ꢀ
ꢀ
Internal data transfer, or instruction operand holding
It cannot be addressed.
4.2.2 CONT (Control Register)
7
6
5
4
3
2
1
0
-
/INT
TS
TE
PAB
PSR2
PSR1
PSR0
Bit 0 (PSR0) ~ Bit 2 (PSR2) TCC/WDT prescaler bits.
PSR2
PSR1
PSR0
TCC Rate
1:2
WDT Rate
1:1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:4
1:2
1:8
1:4
1:16
1:8
1:32
1:16
1:32
1:64
1:128
1:64
1:128
1:256
Bit 3 (PAB) Prescaler assignment bit.
0: TCC
1: WDT
Bit 4 (TE) TCC signal edge
0: increment if the transition from low to high takes place on TCC pin
1: increment if the transition from high to low takes place on TCC pin
Bit 5 (TS) TCC signal source
0: internal instruction cycle clock
1: transition on TCC pin
Bit 6 (/INT) Interrupt enable flag
0: masked by DISI or hardware interrupt
1: enabled by ENI/RETI instructions
Not used.
Bit 7
CONT register is both readable and writable.
4.2.3 IOC5 ~ IOC6 (I/O Port Control Register)
"1" put the relative I/O pin into high impedance, while "0" defines the relative I/O pin as
output.
8 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
