EM78156E
8-Bit Microcontroller with MASK ROM
Only the lower 4 bits of IOC5 can be defined.
IOC5 and IOC6 registers are both readable and writable.
4.2.4 IOCA (Prescaler Counter Register)
ꢀ
ꢀ
ꢀ
IOCA register is readable.
The value of IOCA is equal to the contents of Prescaler counter.
Down counter.
4.2.5 IOCB (Pull-down Control Register)
7
6
5
4
3
2
1
0
/PD7
/PD6
/PD5
/PD4
-
/PD2
/PD1
/PD0
Bit 0 (/PD0) Control bit is used to enable the pull-down of P50 pin.
0: Enable internal pull-down
1: Disable internal pull-down
Bit 1 (/PD1) Control bit is used to enable the pull-down of P51 pin.
Bit 2 (/PD2) Control bit is used to enable the pull-down of P52 pin.
Bit 3
Not used.
Bit 4 (/PD4) Control bit is used to enable the pull-down of P60 pin.
Bit 5 (/PD5) Control bit is used to enable the pull-down of P61 pin.
Bit 6 (/PD6) Control bit is used to enable the pull-down of P62 pin.
Bit 7 (/PD7) Control bit is used to enable the pull-down of P63 pin.
IOCB Register is both readable and writable.
4.2.6 IOCC (Open-drain Control Register)
7
6
5
4
3
2
1
0
OD7
OD6
OD5
OD4
OD3
OD2
OD1
OD0
Bit 0 (OD0) Control bit used to enable the open-drain of P60 pin.
0: Disable open-drain output
1: Enable open-drain output
Bit 1 (OD1) Control bit is used to enable the open-drain of P61 pin.
Bit 2 (OD2) Control bit is used to enable the open-drain of P62 pin.
Bit 3 (OD3) Control bit is used to enable the open-drain of P63 pin.
Bit 4 (OD4) Control bit is used to enable the open-drain of P64 pin.
Bit 5 (OD5) Control bit is used to enable the open-drain of P65 pin.
Product Specification (V1.3) 07.29.2004
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(This specification is subject to change without further notice)