EM77950
BB Controller
7.3.5 Serial Peripheral Serial (SPI) Enable Control Register – SPIC
(0x85)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPI_RBF
CES
SBR2
SBR1
SBR0
SDID
SDOD
SPIS
Bit 0 (SPIS): SPI start.
Bit 1 (SDOD): SPI data shift out direction.
0: Most significant bit (MSB) transmitted first
1: Least significant bit (LSB) transmitted first
Bit 2 (SDID): SPI data shift in direction.
0: Most significant bit (MSB) received first
1: Least significant bit (LSB) received first
Bit 3 ~ 5 (SBR0 ~ SBR2): Configure the transmission mode and the clock rate.
SBR2 (Bit5)
SBR1 (Bit4)
SBR0 (Bit3)
Mode
Master
Master
Master
Master
Master
Slave
N/A
Baud Rate
Fosc/2
Fosc/4
Fosc/8
Fosc/16
Fosc/32
N/A
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
N/A
N/A
N/A
Bit 6 (CES): Clock edge select bit.
0 : Data shifts out on a rising edge, and shifts in on a falling edge. Data is
held during a low level
1 : Data shifts out on falling edge, and shifts in on rising edge. Data is hold
during the high level
Bit 7 (SPI_RBF): SPI read buffer full flag.
7.3.6 I/O Control Registers – IOCA~IOCF (0x86~0x8B)
IOCX is used to determine the data direction of its corresponding I/O port bit.
0 : configure a selected I/O pin as output
1 : configure a selected I/O pin as input
The only four least significant bits of port F, and the only five least significant bits of port
C are available.
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
