EM73PA88A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
EM73PA88A speech synthesizer operates as following :
1. Send the speech start address to the address latch by writing P6 four times.
2. Choose the sampling rate, enable the speech synthesizer by writing P5.
3. The ROM address counters send the ROM address A6 .. A17 to the speech ROM.
4. ACT is the speech acknowledge signal. When the speech synthesizer has voice output. ACT is high .
When ACT is changed from high to low, the speech synthesizer can generate the speech ending
interrupt SPI. The ACT signal can be read from P5.3.
SPEECH SYNTHESIZER CONTROL
Speech sample rate control register (P5 write) :
3
2
1
0
Initial value : *111
SR
SR
000
001
010
011
100
101
111
Sample rate selection
Sample rate
PWM on CLK/64/1/3
CLK/64/1/4
CLK/64/2/3
CLK/64/2/4
CLK/64/3/3
CLK/64/3/4
PWM off
24K
18K
12K
9K
8K
6K
port 5 -- initialization is "*111".
port 6 -- initialization is pointed to the low-
nibble of start address latch.
CLK=4.6 MHz
Speech active flag (P5 read) :
3
2
1
*
0
*
Initial value : 0***
ACT *
ACT is the speech acknowledge signal. When the speech synthesizer has voice output, ACT is high. When
ACT is high → low, the speech synthesizer can generate the speech ending interrupt SPI.
Speech start address register (P6 write) :
3
2
1
0
Initial value : 1111
Port 6
P6L1
A9 A8 A7 A6
P6L2
P6L3
P6L4
-
A13 A12 A11 A10 A17 A16 A15 A14
-
-
A18
Send the speech start address to the speech synthesizer by writing P6 four times. There is a pointer counter to
point the address latch (P6L1, P6L2, P6L3, P6L4). It will increase one when write P6. So, the first time
writing P6 to P6L1, the second time is P6L2, the third time is P6L3, the fourth time is P6L4 and the fifth time
is P6L1 latch again, ... etc. The pointer counter point to P6L1 when CPU is reset or P5 is writen.
In the NORMAL operation mode, the speech synthesizer is available. In the other operation modes, it is
disable.
* This specification are subject to be changed without notice.
10.8.2001
26
ELAN [ ELAN MICROELECTRONICS CORP ]
