EM73PA88A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Under the pulse width measurement mode, the counter is incresed at the rising edge of internal pulse during
external timer/counter input (P8.1/TRGB, P8.3/TRGA ) in high level, interrupt request is generated as soon as
timer/counter count overflow.
P8.1/TRGB(P8.3/TRGA)
Internal pulse
n
n+1
n+2
n+3
n+4
n+5
TimerB(TimerA) value
PROGRAM EXAMPLE: Enable timerA by pulse width measurement mode.
LDIA #1100b;
OUTA P28; Enable timerA with pulse width measurement mode.
INTERRUPT FUNCTION
Six interrupt sources are available, 2 from external interrupt sources and 4 from internal interrupt sources.
Multiple interrupts are admitted according to their priority.
Type
Interruptsource
Priority Interrupt
Latch
Interrupt
Enable condition
ProgramROM
entry address
External External interrupt(INT0)
Internal speech end interrupt (SPI)
Internal TimerA overflow interrupt (TRGA) 3
Internal TimerB overflow interrupt (TRGB) 4
Internal Time base interrupt(TBI)
External External interrupt(INT1)
1
2
IL5
IL4
IL3
IL2
IL1
IL0
EI=1
002h
004h
006h
008h
00Ah
00Ch
EI=1, MASK3=1
EI=1, MASK2=1
EI=1, MASK1=1
5
6
EI=1,MASK0=1
INTERRUPT STRUCTURE
MASK0 MASK1 MASK1 MASK2 MASK3
SPI
INT1
r0
TRGB TRGA
r2 r3
INT0
r5
TBI
r1
r4
Reset by system reset and program
IL2
IL3
IL4
IL0
IL1
IL5
instruction
Priority checker
Reset by system reset and program
instruction
Entry address generator
Interrupt entry address
EI
Set by program instruction
Interrupt request
Interrupt controller:
IL0-IL5
: Interrupt latch. Hold all interrupt requests from all interrupt sources. IL's can not
be set by program, but can be reset by program or system reset, so IL can only
decide which interrupt source can be accepted.
MASK0-MASK3 : Except INT0, MASK register may permit or inhibit all interrupt sources.
* This specification are subject to be changed without notice.
10.8.2001
22
ELAN [ ELAN MICROELECTRONICS CORP ]
