EM65101
128COM/160SEG 16 Gray Scale Level LCD Driver
6.4 LCD Driver Circuit Signals
Symbol
I/O
Description
Segment output pins for LCD drives.
According to the Display RAM data, not lighted at “0”, lighted at “1” (Normal
Mode). Not lighted at “1”, lighted at “0” (Reverse Mode) and, by a combination of
the M signal and display data, one signal level among V0,V2,V3 and VSS signal
levels are selected.
M Signal
SEG0
to
(internal)
O
SEG159
Display RAM
Data
V2
V0
V0
V3 VSS
Normal Mode
Reverse Mode
V2 VSS V3
Common output pins for the LCD drivers. By combining the scanned data and M
signal, one signal level among V0, V1, V4 and VSS signal level is selected.
Data
M
Output Level
COM0
to
COM127
H
L
H
L
H
H
L
VSS
V1
V0
O
L
V4
6.5 Oscillating Circuit Pins
Symbol
I/O
Description
Display timing clock source select input pin.
CKS = “H”: Use external clock from CK pin.
CKS = “L”: Use internal oscillated clock.
CKS
I
In the case of TCP, draw it as a separate terminal.
External clock input pin for displaying the timing (CKS=1) or internal clock output
pin for displaying the timing (CKS=0).
CK
I/O
When using the internal oscillated clock, CK must be floating.
6.6 EEPROM Power Pins
Symbol
I/O
Description
VPP
I
External power-forcing pin for programming or erasing EEPROM, 17~18V.
12 •
Product Specification (V0.4) 08.15.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
