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EDS2516APTA-7AL 参数 Datasheet PDF下载

EDS2516APTA-7AL图片预览
型号: EDS2516APTA-7AL
PDF下载: 下载PDF文件 查看货源
内容描述: 256M位的SDRAM [256M bits SDRAM]
分类和应用: 动态存储器
文件页数/大小: 51 页 / 553 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDS2504ACTA/08ACTA/16ACTA, EDS2504APTA/08APTA/16APTA  
Test Conditions  
Input and output timing reference levels: 1.4V  
Input waveform and output load: See following figures  
2.4 V  
I/O  
2.0 V  
input  
0.8 V  
0.4 V  
CL  
t
T
tT  
Output load  
Relationship Between Frequency and Minimum Latency  
Parameter  
-7A  
-75  
Frequency (MHz)  
tCK (ns)  
133  
7.5  
Symbol  
lRCD  
7.5  
3
Notes  
1
Active command to column command  
(same bank)  
Active command to active command  
(same bank)  
2
8
6
2
2
lRC  
9
6
3
2
1
1
1
1
Active command to precharge command  
(same bank)  
lRAS  
lRP  
Precharge command to active command  
(same bank)  
Write recovery or data-in to precharge  
command (same bank)  
lDPL  
Active command to active command  
(different bank)  
lRRD  
lSREX  
lDAL  
2
1
4
2
1
5
1
Self refresh exit time  
2
Last data in to active command  
(Auto precharge, same bank)  
= [lDPL + lRP]  
= [lRC]  
3
Self refresh exit to command input  
lSEC  
8
9
Precharge command to high impedance  
(CL = 2)  
2
3
1
lHZP  
lHZP  
2
3
(CL = 3)  
Last data out to active command  
(auto precharge) (same bank)  
lAPR  
1
Last data out to precharge (early precharge)  
(CL = 2)  
lEP  
lEP  
–1  
–2  
–1  
–2  
(CL = 3)  
Column command to column command  
Write command to data in latency  
DQM to data in  
lCCD  
lWCD  
lDID  
1
0
0
2
1
2
0
1
1
0
0
2
1
2
0
1
DQM to data out  
lDOD  
lCLE  
lMRD  
lCDD  
lPEC  
CKE to CLK disable  
Register set to active command  
/CS to command disable  
Power down exit to command input  
4
Notes: 1.IRCD to IRRD are recommended value.  
2. Be valid [DESL] or [NOP] at next command of self refresh exit.  
3. Except [DESL] and [NOP]  
4. EDS2504AC/08AC/16AC is possible lMRD 1 clock.  
Data Sheet E0110E30 (Ver. 3.0)  
7
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