EDJ1108BABG, EDJ1116BABG
Clock Jitter [DDR3-1066, 800]
-AC, -AE, -AG
1066
-8A, -8C
800
Data rate (Mbps)
Parameter
Symbol
min.
max.
3333
min.
max.
3333
Unit
ps
Notes
1
Average clock period
tCK (avg)
1875
2500
tCK(avg)min + tCK(avg)max+ tCK(avg)min + tCK(avg)max+
Absolute clock period
tCK (abs)
tJIT (per)
ps
ps
ps
ps
ps
2
6
6
7
7
tJIT(per)min
tJIT(per)max tJIT(per)min
tJIT(per)max
100
Clock period jitter
Clock period jitter during
DLL locking period
Cycle to cycle period jitter
Cycle to cycle clock period jitter
during DLL locking period
−90
90
−100
tJIT (per, lck) −80
tJIT (cc)
80
−90
90
180
160
200
180
tJIT (cc, lck)
Cumulative error across 2 cycles
Cumulative error across 3 cycles
Cumulative error across 4 cycles
Cumulative error across 5 cycles
Cumulative error across 6 cycles
Cumulative error across 7 cycles
Cumulative error across 8 cycles
Cumulative error across 9 cycles
tERR (2per)
tERR (3per)
tERR (4per)
tERR (5per)
tERR (6per)
tERR (7per)
tERR (8per)
tERR (9per)
−132
132
157
175
188
200
209
217
224
231
237
242
−147
−175
−194
−209
−222
−232
−241
−249
−257
−263
−269
147
175
194
209
222
232
241
249
257
263
269
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
8
8
8
8
8
8
8
8
8
8
8
−157
−175
−188
−200
−209
−217
−224
Cumulative error across 10 cycles tERR (10per) −231
Cumulative error across 11 cycles tERR (11per) −237
Cumulative error across 12 cycles tERR (12per) −242
Cumulative error across
n=13, 14…49,50 cycles
tERR (nper) min. = (1+0.68in(n)) x tJIT(per) min
tERR (nper) max. = (1+0.68in(n)) x tJIT(per) max
tERR (nper)
tCH (avg)
tCL (avg)
tCH (abs)
ps
9
tCK
(avg)
tCK
(avg)
tCK
(avg)
tCK
(avg)
Average high pulse width
0.47
0.47
0.43
0.43
0.53
0.47
0.47
0.43
0.43
0.53
3
Average low pulse width
0.53
0.53
4
Absolute clock high pulse width
10, 11
Absolute clock low pulse width
Duty cycle jitter
tCL (abs)
tJIT (duty)
10, 12
5
ps
Notes: 1. tCK (avg) is calculated as the average clock period across any consecutive 200cycle window, where each
clock period is calculated from rising edge to rising edge.
N
tCK
N
j
Σ
j = 1
N = 200
2. tCK (abs) is the absolute clock period, as measured from one rising edge to the next consecutive rising
edge. tCK (abs) is not subject to production test.
3. tCH (avg) is defined as the average high pulse width, as calculated across any consecutive 200 high
pulses.
N
(N × t
)
tCH
CK(avg)
j
Σ
j = 1
N = 200
Data Sheet E1248E40 (Ver. 4.0)
61
ELPIDA [ ELPIDA MEMORY ]
