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EDJ1108BABG-DG-E 参数 Datasheet PDF下载

EDJ1108BABG-DG-E图片预览
型号: EDJ1108BABG-DG-E
PDF下载: 下载PDF文件 查看货源
内容描述: 1G位DDR3 SDRAM [1G bits DDR3 SDRAM]
分类和应用: 存储内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 148 页 / 1878 K
品牌: ELPIDA [ ELPIDA MEMORY ]
 浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第105页浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第106页浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第107页浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第108页浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第110页浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第111页浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第112页浏览型号EDJ1108BABG-DG-E的Datasheet PDF文件第113页  
EDJ1108BABG, EDJ1116BABG  
Write Timing Definition  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8  
T9  
T10  
1
/CK*  
CK  
3
WRIT  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
Command*  
WL = AL + CWL  
Bank,  
Col n  
4
Address*  
tDQSS tDSH  
tDSH  
tDSH  
tDSH  
tWPRE (min)  
tWPST (min)  
tDQSS(min)  
DQS, /DQS  
tDQSH  
tDQSL tDQSL  
tDQSH  
tDQSH  
tDQSH  
tDQSL  
tDQSH (min)  
tDQSL  
tDQSL (min)  
tDSS  
tDSS  
tDSS  
tDSS  
tDSS  
Din  
Din  
Din  
Din  
Din  
Din  
Din  
Din  
n
2
DQ*  
n + 1 n + 2 n + 3 n + 4 n + 5 n + 6 n + 7  
tDSH  
tDSH  
tDSH  
tDSH  
tWPRE (min)  
tWPST (min)  
tDQSL (min)  
DQS, /DQS  
tDQSH  
tDQSH  
tDQSH  
tDQSH  
tDQSL  
tDQSH (min)  
tDQSL  
tDQSL  
tDQSL  
tDSS  
tDSS  
tDSS  
tDSS  
tDSS  
Din  
Din  
Din  
Din  
Din  
Din  
Din  
Din  
n
2
DQ*  
n + 1 n + 2 n + 3 n + 4 n + 5 n + 6 n + 7  
tDQSS  
tDSH  
tWPRE (min)  
tDSH  
tDSH  
tDSH  
tDQSS(max)  
tWPST (min)  
DQS, /DQS  
tDQSH  
tDQSL  
tDQSH  
tDQSH  
tDQSH  
tDQSL  
tDQSL  
tDQSL  
tDQSL (min)  
tDQSH (min)  
tDSS  
tDSS  
tDSS  
tDSS  
tDSS  
Din  
n
Din  
Din  
Din  
Din  
Din  
Din  
Din  
2
DQ*  
n + 1 n + 2 n + 3 n + 4 n + 5 n + 6 n + 7  
Notes: 1.  
BL8, WL = 5 (AL = 0, CWL = 5)  
Din n = data-in from column n.  
VIH or VIL  
2.  
3.  
NOP commands are shown for ease of illustration; other commands may be valid at these times.  
4. BL8 setting activated by MR0 bit [A1, A0] = [0, 0] or MR0 bit [A1, A0] = [0, 1] and A12 = 1 during WRIT command at T0.  
5. tDQSS must be met at each rising clock edge.  
Write Timing Definition  
Data Sheet E1248E40 (Ver. 4.0)  
109  
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