EDJ1108BABG, EDJ1116BABG
IDD Measurement Conditions for IDD5B
Symbol
IDD5B
Name
Burst refresh current
Measurement Condition
Timing Diagram Example
CKE
H
External Clock
on
tCK
tCK min. (IDD)
tRC
N/A
tRAS
N/A
tRCD
N/A
tRRD
N/A
tRFC
tRFC min. (IDD)
N/A
CL
AL
N/A
/CS
H between valid commands
SWITCHING
SWITCHING
Address and command inputs
Data inputs
Output buffer DQ, DQS
/ MR1 bit A12
off / 1
disabled
/ [0,0,0]
/ [0,0]
ODT
/ MR1 bits [A9, A6, A2]
/ MR2 bits [A1, A0]
Burst length
Active banks
Idle banks
N/A
Refresh command every tRFC = tRFC (min.)
none
Precharge Power-down
Mode / MR0 bit A12
N/A
Data Sheet E1248E40 (Ver. 4.0)
41
ELPIDA [ ELPIDA MEMORY ]
