EDE5104AGSE, EDE5108AGSE
Function Truth Table
The following tables show the operations that are performed when each command is issued in each state of the
DDR SDRAM.
Current state
Idle
/CS /RAS /CAS /WE Address
Command Operation
Notes
H
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
×
H
H
H
H
H
L
×
H
L
L
L
L
H
H
H
L
L
L
L
×
H
L
L
L
L
H
H
H
L
L
L
L
×
H
L
L
L
L
H
H
H
L
L
L
L
×
×
DESL
NOP
Nop or Power down
H
H
H
L
×
Nop or Power down
ILLEGAL
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, RA
READ
READA
WRIT
WRITA
ACT
1
1
1
1
ILLEGAL
ILLEGAL
L
ILLEGAL
H
L
Row activating
Precharge
L
BA, A10 (AP)
A10 (AP)
PRE
L
L
PALL
REF
Precharge all banks
Auto refresh
Self refresh
L
H
H
L
×
2
2
2
2
L
×
SELF
MRS
L
BA, MRS-OPCODE
Mode register accessing
Extended mode register accessing
Nop
L
L
BA, EMRS-OPCODE EMRS
Bank(s) active
×
×
×
DESL
NOP
H
H
H
H
H
L
H
H
H
L
×
Nop
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, RA
READ
READA
WRIT
WRITA
ACT
Begin Read
Begin Read
Begin Write
L
Begin Write
H
L
ILLEGAL
1
L
BA, A10 (AP)
A10 (AP)
PRE
Precharge
L
L
PALL
REF
Precharge all banks
ILLEGAL
L
H
H
L
×
L
×
SELF
MRS
ILLEGAL
L
BA, MRS-OPCODE
ILLEGAL
L
L
BA, EMRS-OPCODE EMRS
ILLEGAL
Read
×
×
×
DESL
NOP
Continue burst to end -> Row active
Continue burst to end -> Row active
Burst interrupt
Burst interrupt
ILLEGAL
H
H
H
H
H
L
H
H
H
L
×
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, CA, A10 (AP)
BA, RA
READ
READA
WRIT
WRITA
ACT
1, 4
1, 4
1
L
ILLEGAL
1
H
L
ILLEGAL
1
L
BA, A10 (AP)
A10 (AP)
PRE
ILLEGAL
1
L
L
PALL
REF
ILLEGAL
L
H
H
L
×
ILLEGAL
L
×
SELF
MRS
ILLEGAL
L
BA, MRS-OPCODE
ILLEGAL
L
L
BA, EMRS-OPCODE EMRS
ILLEGAL
Preliminary Data Sheet E0715E20 (Ver. 2.0)
20
ELPIDA [ ELPIDA MEMORY ]
