EDE1104ACSE, EDE1108ACSE, EDE1116ACSE
DC Characteristics 1 (TC = 0°C to +85°C, VDD, VDDQ = 1.8V ± 0.1V)
max.
× 4
× 8
× 16
Parameter
Symbol Grade
-8E
Unit
mA
Test condition
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
85
80
75
85
80
75
110
100
90
Operating current
(ACT-PRE)
IDD0
-6E
-5C
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
-8E
-6E
-5C
100
95
90
100
95
90
130
120
110
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
(ACT-READ-PRE)
IDD1
mA
all banks idle;
Precharge power-
down standby
current
-8E
IDD2P -6E
-5C
10
10
10
10
10
10
10
10
10
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
mA
mA
mA
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
-8E
IDD2Q -6E
-5C
35
30
25
35
30
25
35
30
25
Precharge quiet
standby current
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-8E
40
35
30
40
35
30
40
35
30
Idle standby current IDD2N -6E
-5C
-8E
IDD3P-F -6E
35
35
30
35
35
30
35
35
30
all banks open;
Fast PDN Exit
tCK = tCK (IDD);
MRS (12) = 0
CKE is L;
mA
mA
-5C
Active power-down
standby current
Other control and address
-8E
IDD3P-S -6E
-5C
20
20
20
20
20
20
20
20
20
bus inputs are STABLE;
Data bus inputs are
FLOATING
Slow PDN Exit
MRS (12) = 1
all banks open;
-8E
IDD3N -6E
-5C
90
80
65
90
80
65
90
80
65
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Active standby
current
mA
mA
all banks open, continuous burst reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Operating current
(Burst read
operating)
-8E
IDD4R -6E
-5C
160
140
120
160
140
120
200
175
150
Data pattern is same as IDD4W
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Operating current
(Burst write
operating)
-8E
IDD4W -6E
-5C
160
140
120
160
140
120
200
175
150
mA
Data Sheet E0975E50 (Ver.5.0)
8
ELPIDA [ ELPIDA MEMORY ]
