EDE1104ABSE, EDE1108ABSE, EDE1116ABSE
Pin Configurations
/xxx indicates active low signal.
68-ball FBGA
(×8, ×4 organization)
92-ball FBGA
(×16 organization)
1
2
3
7
8
9
1
2
3
7
8
9
A
B
C
D
E
A
B
C
D
E
NC
NC
NC
NC
NC
NC
NC
NC
NC
VDD
VSS
VSSQ /UDQS VDDQ
UDQS VSSQ DQ15
NU/ /RDQS
(NC)*
VDD
VSS
VSSQ /DQS VDDQ
VSSQ
DQ14
UDM
F
G
H
J
F
G
H
J
DQ6
(NC)*
DQ7
DQS VSSQ
(NC)*
DM/RDQS
VSSQ
DQ9 VDDQ
VSSQ DQ11
VDDQ
DQ12
VDDQ DQ8
VDDQ
(DM)*
VDDQ
DQ1 VDDQ
VSSQ DQ3
VREF VSS
CKE /WE
VDDQ DQ0 VDDQ
DQ10 VSSQ DQ13
VSSQ /LDQS VDDQ
LDQS VSSQ DQ7
DQ4
(NC)*
DQ5
(NC)*
DQ2 VSSQ
VSSDL CK
VDD
DQ6
NC
VSS
VDDL
VDD
ODT
VSSQ LDM
DQ1 VDDQ
K
L
K
L
/RAS
/CAS
A2
/CK
/CS
A0
VDDQ
DQ5
VDDQ DQ0
DQ2 VSSQ
VSSDL CK
VDDQ
BA2
BA0
A10
BA1
A1
DQ4 VSSQ DQ3
VDDL VREF VSS
CKE /WE
M
N
P
M
N
P
R
T
VDD
VSS
VDD
VSS
VDD
A3
A7
A5
A9
NC
A6
A11
NC
A4
A8
/RAS
/CAS
A2
/CK
/CS
A0
ODT
VDD
VSS
BA0
A10
A3
BA1
A1
BA2
R
T
A12
A13
VSS
A5
A6
A4
U
V
U
V
A7
A9
A11
A8
A12
NC
VDD
NC
NC
NC
W
NC
NC
NC
NC
W
X
(Top view)
Note: ( )* marked pins are for ×4 organization.
AA
NC
NC
NC
(Top view)
Pin name
Function
Pin name
ODT
Function
ODT control
A0 to A13
Address inputs
Bank select
BA0, BA1, BA2
DQ0 to DQ15
VDD
Supply voltage for internal circuit
Ground for internal circuit
Data input/output
VSS
DQS, /DQS,
UDQS, /UDQS,
LDQS, /LDQS
Differential data strobe
VDDQ
Supply voltage for DQ circuit
RDQS, /RDQS
/CS
Differential data strobe for read
Chip select
VSSQ
VREF
VDDL
VSSDL
NC*1
Ground for DQ circuit
Input reference voltage
Supply voltage for DLL circuit
Ground for DLL circuit
No connection
/RAS, /CAS, /WE
CKE
Command input
Clock enable
CK, /CK
Differential clock input
Write data mask
DM, UDM, LDM
NU*2
Not usable
Notes: 1. Not internally connected with die.
2. Don’t connect. Internally connected.
Data Sheet E0852E50 (Ver. 5.0)
3
ELPIDA [ ELPIDA MEMORY ]
