EDD1204ALTA, EDD1208ALTA, EDD1216ALTA
CBR (auto) refresh command
Fig.7 CBR (auto) refresh
command
(/CS, /RAS, /CAS = Low, /WE, CKE = High)
CLK
This command is a request to begin the CBR (auto) refresh operation.
The refresh address is generated internally.
CKE
/CS
H
Before executing CBR (auto) refresh, all banks must be precharged.
After this cycle, all banks will be in the idle (precharged) state and ready for a
bank activate command.
/RAS
/CAS
/WE
During tRFC (refresh command to refresh or activate command period), the
EDD12xxALTA cannot accept any other command.
BA0, BA1
A10
Add
Self refresh entry command
Fig.8 Self refresh entry command
(/CS, /RAS, /CAS, CKE = Low, /WE = High)
CLK
CKE
After the command execution, self refresh operation continues while CKE
remains low.
/CS
/RAS
/CAS
/WE
When CKE goes high, the EDD12xxALTA will exit the self refresh mode.
During self refresh mode, refresh interval and refresh operation are performed
internally, so there is no need for external control.
Before executing self refresh, all banks must be precharged.
BA0, BA1
A10
Add
Burst stop command
Fig.9 Burst stop command
(/CS, /WE = Low, /RAS, /CAS = High)
This command can stop the current read burst operation.
CLK
CKE
/CS
H
/RAS
/CAS
/WE
BA0, BA1
A10
Add
13
Preliminary Data Sheet E0136E30
ELPIDA [ ELPIDA MEMORY ]
