EBE51UD8AGWA
Serial PD Matrix
Byte No. Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments
Number of bytes utilized by module
0
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
80H
08H
128 bytes
256 bytes
manufacturer
Total number of bytes in serial PD
device
2
3
4
5
6
7
Memory type
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
08H
0EH
0AH
60H
40H
00H
DDR2 SDRAM
Number of row address
Number of column address
Number of DIMM ranks
Module data width
14
10
1
64
0
Module data width continuation
Voltage interface level of this
8
9
0
0
0
0
0
1
0
1
05H
SSTL 1.8V
assembly
DDR SDRAM cycle time, CL = 5
-6E
-5C
SDRAM access from clock (tAC)
-6E
0
0
0
0
0
1
1
1
0
1
1
0
0
1
0
0
1
1
0
0
0
0
1
1
30H
3DH
45H
3.0ns*1
3.75ns*1
0.45ns*1
10
-5C
0
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
50H
00H
82H
08H
00H
00H
0.5ns*1
None.
7.8µs
× 8
11
12
13
14
15
DIMM configuration type
Refresh rate/type
Primary SDRAM width
Error checking SDRAM width
Reserved
None.
0
SDRAM device attributes:
16
17
18
0
0
0
0
0
0
0
0
1
0
0
1
1
0
1
1
1
0
0
0
0
0
0
0
0CH
04H
38H
4,8
Burst length supported
SDRAM device attributes: Number of
banks on SDRAM device
SDRAM device attributes:
/CAS latency
4
3, 4, 5
19
20
21
DIMM Mechanical Characteristics
DIMM type information
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
01H
02H
00H
4.00mm max.
Unbuffered
Normal
SDRAM module attributes
Weak Driver 50Ω
22
23
SDRAM device attributes: General
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
1
03H
3DH
ODT Support
Minimum clock cycle time at CL = 4
-6E, -5C
3.75ns*1
0.5ns*1
Maximum data access time (tAC) from
24
clock at CL = 4
0
1
0
1
0
0
0
0
50H
-6E, -5C
25
26
27
Minimum clock cycle time at CL = 3
Maximum data access time (tAC) from
clock at CL = 3
0
0
0
1
1
0
0
1
1
1
0
1
0
0
1
0
0
1
0
0
0
0
0
0
50H
60H
3CH
5.0ns*1
0.6ns*1
15ns
Minimum row precharge time (tRP)
Preliminary Data Sheet E0921E10 (Ver. 1.0)
5
ELPIDA [ ELPIDA MEMORY ]
