EBE51RD8AJFA
-6E
Speed bin
DDR2-667 (5-5-5)
Parameter
Symbol
tRRD
tCCD
tWR
min.
7.5
2
max.
Unit
ns
Notes
Active bank A to active bank B command period
/CAS to /CAS command delay
Write recovery time
nCK
ns
15
WR + RU
(tRP/tCK(avg))
Auto precharge write recovery + precharge time
tDAL
nCK
1, 9
14
Internal write to read command delay
tWTR
tRTP
7.5
ns
Internal read to precharge command delay
Exit self-refresh to a non-read command
Exit self-refresh to a read command
7.5
ns
tXSNR
tXSRD
tXP
tRFC + 10
ns
200
2
nCK
nCK
nCK
Exit precharge power down to any non-read command
Exit active power down to read command
tXARD
2
3
Exit active power down to read command
(slow exit/low power mode)
tXARDS
7 − AL
nCK
2, 3
CKE minimum pulse width (high and low pulse width)
Output impedance test driver delay
tCKE
tOIT
3
nCK
ns
0
12
12
MRS command to ODT update delay
tMOD
tRFC
0
ns
Auto-refresh to active/auto-refresh command time
105
ns
Average periodic refresh interval
(0°C ≤ TC ≤ +85°C)
tREFI
7.8
3.9
µs
µs
ns
(+85°C < TC ≤ +95°C)
tREFI
Minimum time clocks remains ON after CKE
asynchronously drops low
tIS + tCK(avg)
+ tIH
tDELAY
Data Sheet E1036E30 (Ver. 3.0)
18