CMOS Voltage detector with delay circuit and Manual Reset function
ELM73xxxxxA
■Test circuits
1) Detection voltage
2) Current consumption
A
VDD
R*
VDD
ELM73xxxxxA
VSS
OUT
ExtC
VDD MR
VdetN
3V
ELM73xxxxxA
OUT
ExtC
VDD
MR
V
VSS
* Pull up circuit is necessary for N-ch output only.
R=100kΩ(R=1MΩ for Vdd min measurement.
3)-(1) Output current (N-ch)
3)-(2) Output current (P-ch)
VDD
OUT
VDD
VDS
OUT
A
VDD MR
VDD MR
ELM73xxxxxA
ELM73xxxxxA
VSS
ExtC
VDS
ExtC
A
VSS
4) Leakage current
5) Delay time
VDD
1MΩ
VDD
VdetN+1V
A
OUT
MR
OUT
ExtC
3V
ELM73xxxxxA
VSS
ExtC
VDD MR
*
1.0V
VSS
** Input pulse
ELM73xxxxxA
VSS
P.G
4.7nF
* Pull up circuit is necessary for N-ch output only.
6) MR voltage
7) MR pull-up resistance
VDD
VDD
ELM73xxxxxA
VSS
100kΩ
100kΩ
3V
OUT
ExtC
OUT
ExtC
MR
MR
VDD
VDD
ELM73xxxxxA
VSS
3V
V
V
V
V
Vmr
Vmr
* Pull up circuit is necessary for N-ch output only.
* Pull up circuit is necessary for N-ch output only.
Rev.1.1
16 - 7