GD25LQ40xIGx 1.8V Uniform Sector Dual and Quad Serial Flash
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8. ELECTRICAL CHARACTERISTICS
8.1. Power-On Timing
Figure 38. Power-On Timing Sequence Diagram
Table 3. Power-Up Timing and Write Inhibit Threshold
Parameter Min
Symbol
Max
Unit
tVSL
tPUW
VWI
VCC(min) To CS# Low
10
1
us
ms
V
Time Delay From VCC(min) To Write Instruction
Write Inhibit Voltage VCC(min)
10
1
1.4
8.2. Initial Delivery State
The device is delivered with the memory array erased: all bits are set to 1(each byte contains FFH). The Status
Register contains 00H (all Status Register bits are 0).
8.3. Data Retention and Endurance
Parameter
Test Condition
Min
Unit
150°C
125°C
10
20
Years
Years
Minimum Pattern Data Retention Time
Erase/Program Endurance
-40 to 85°C
100K
Cycles
8.4. Latch Up Characteristics
Parameter
Min
Max
Input Voltage Respect To VSS On I/O Pins
VCC Current
-1.0V
VCC+1.0V
100mA
-100mA
Rev.1.0
59 - 50
ELM [ ELM ELECTRONICS ]
