DM9016
3-port switch with Processor Interface
10.4.3 Processor I/O Write Timing
T1
T2
CS#,CMD
T4
T3
IOW#
∫ ∫
T5
SD0~31
T6
Symbol
Parameter
CS#,CMD valid to IOW# valid
IOW# Invalid to CS#,CMD Invalid
IOW# Width
IOW# Invalid to next IOW#/IOR# valid
When write DM9016 INDEX port
IOW# Invalid to next IOW#/IOR# valid
When write DM9016 DATA port
System Data(SD) Hold Time
Min.
5
0
20
1
Typ.
Max.
Unit
ns
ns
ns
clk*
T1
T2
T3
T4
T4
2
clk*
T5
T6
3
5
1
ns
ns
clk*
System Data(SD) Setup Time
T3+T4 IOW# Invalid to next IOW#/IOR# valid
When write DM9016 memory
Note: the Unit: clk is under the internal system clock 50MHz.
Preliminarydatasheet
DM9016-13-DS-P01
March 26, 2009
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