DM9010
Single Chip Ethernet Controller with General Processor Interface
3. Features
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100-pin LQFP.
checking
Supports processor interface: Byte/word/Dword
of I/O command to internal memory data
operation
Integrated 10/100M transceiver with
HP Auto-MDIX
Supports MII and reverses MII interface
Supports back pressure mode for half-duplex
mode flow control
IEEE802.3x flow control for full-duplex mode
Supports wakeup frame, link status change and
magic packet events for remote wake up
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Supports automatically load vendor ID and
product ID from EEPROM
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Supports 7 or 23 GPIO pins
Optional EEPROM configuration
Very low power consumption mode:
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Power reduced mode (cable detection)
Power down mode
Selectable TX drivers for 1:1 or 1.25:1
transformers for additional power reduction.
1: 1 transformers only when HP Auto-MDIX
Enable .
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Integrated 16K Byte SRAM
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Compatible with 3.3V and 5.0V tolerant I/O
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Build in 3.3V to 2.5V regulator
Supports early Transmit
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Supports IP/TCP/UDP checksum generation and
Preliminary
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Version: DM9010-17--DS-P04
Jan. 18, 2006
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
