DM9010 参数 Datasheet PDF下载

DM9010

Single Chip Ethernet Controller with General Processor Interface

6.47 M

EMORY DATA WRITE COMMAND WITH ADDRESS INCREMENT

R

EGISTER

(F8H)........................................................ 28

6.48 M

EMORY DATA WRITE

_

ADDRESS

R

EGISTER

(FAH~FBH).......................................................................................... 28

6.49 TX P

ACKET

L

ENGTH

R

EGISTER

(FCH~FDH)............................................................................................................. 28

6.50 I

NTERRUPT

S

TATUS

R

EGISTER

(FEH) ......................................................................................................................... 28

6.51 I

NTERRUPT

M

ASK

R

EGISTER

(FFH)............................................................................................................................ 29

7. EEPROM FORMAT........................................................................................................................................................ 30

8. MII REGISTER DESCRIPTION ................................................................................................................................... 31

8.1 B

ASIC

M

ODE

C

ONTROL

R

EGISTER

(BMCR) - 00 .......................................................................................................... 32

8.2 B

ASIC

M

ODE

S

TATUS

R

EGISTER

(BMSR) - 01.............................................................................................................. 33

8.3 PHY ID I

DENTIFIER

R

EGISTER

#1 (PHYID1) - 02 ........................................................................................................ 35

8.4 PHY ID I

DENTIFIER

R

EGISTER

#2 (PHYID2) - 03 ........................................................................................................ 35

8.5 A

UTO

-

NEGOTIATION

A

DVERTISEMENT

R

EGISTER

(ANAR) - 04 ................................................................................... 35

8.6 A

UTO

-

NEGOTIATION

L

INK

P

ARTNER

A

BILITY

R

EGISTER

(ANLPAR)

–

05................................................................... 36

8.7 A

UTO

-

NEGOTIATION

E

XPANSION

R

EGISTER

(ANER)- 06............................................................................................. 37

8.8 DAVICOM S

PECIFIED

C

ONFIGURATION

R

EGISTER

(DSCR) - 16................................................................................. 38

8.9 DAVICOM S

PECIFIED

C

ONFIGURATION AND

S

TATUS

R

EGISTER

(DSCSR) - 17.......................................................... 39

8.10 10BASE-T C

ONFIGURATION

/S

TATUS

(10BTCSR) - 18.............................................................................................. 40

8.11 P

OWER

D

OWN

C

ONTROL

R

EGISTER

(PWDOR) - 19 ................................................................................................... 41

8.12 (S

PECIFIED CONFIG

) R

EGISTER

– 20 ............................................................................................................................ 42

9. FUNCTIONAL DESCRIPTION..................................................................................................................................... 43

9.1 H

OST

I

NTERFACE

.......................................................................................................................................................... 43

9.2 D

IRECT

M

EMORY

A

CCESS

C

ONTROL

............................................................................................................................ 43

9.3 P

ACKET

T

RANSMISSION

................................................................................................................................................ 43

9.4 P

ACKET

R

ECEPTION

...................................................................................................................................................... 43

9.5 100B

ASE

-TX O

PERATION

............................................................................................................................................. 44

9.5.1 4B5B Encoder ...................................................................................................................................................... 44

9.5.2 Scrambler ............................................................................................................................................................. 44

9.5.3 Parallel to Serial Converter................................................................................................................................. 44

9.5.4 NRZ to NRZI Encoder .......................................................................................................................................... 44

9.5.5 MLT-3 Converter ................................................................................................................................................. 44

9.5.6 MLT-3 Driver....................................................................................................................................................... 44

9.5.7 4B5B Code Group ................................................................................................................................................ 45

Preliminary

Version: DM9010-17--DS-P04

Jan. 18, 2006

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